BRAC University Institutional Repository

Performance comparison of CPLD and PLD based traffic light control system

Show simple item record

dc.contributor.advisor Azad, A.K.M. Abdul Malek Asad, Ishtaque Asaduzzaman, Md. Sobhan, Tanvir Morshed, Khandaker Mohd. Sabbir 2011-01-25T08:36:48Z 2011-01-25T08:36:48Z 2009 2009-09
dc.identifier.other ID 06310016
dc.identifier.other ID 06310025
dc.identifier.other ID 06310015
dc.identifier.other ID 06110025
dc.description This thesis report is submitted in partial fulfillment of the requirements for the degree of Bachelor of Science in Computer Science and Engineering, 2009. en_US
dc.description Cataloged from PDF version of thesis report.
dc.description Includes bibliographical references (page 40).
dc.description.abstract PLD and CPLD has been extensively used for custom made circuits. That is why they are perfect for designing traffic light control systems. Our thesis represents the performance comparison of a traffic light control system designed on GAL (Generic Array Logic) using Programmable Logic Device (PLD) and on FPGA (Field Programmable Gate Array) using Complex Programmable Logic Device (CPLD). For our PLD implementation, we have considered GAL (16V8) chips, which can be reprogrammed and erased. For the CPLD implementation, we have considered FPGA (Altera's Flex 10k family's EPF10K10TC144-4) chip, which is a 144 pin SRAM. The CPLD design was developed using the CPLD programming software MAX PLUS2 v 9.23. The traffic light controller consists of traffic signals (Red, Yellow/Amber & Green). We have designed the traffic controller using both CPLD and PLD. Then we have taken the real time waveform as well as the simulated waveform for different frequencies. The Digital Storage Oscilloscope (DSO).was used to generate the real time wave from the traffic controllers. The results from the real time waveform clearly illustrates that CPLD has the better performance over the PLD technology. Further more we have designed complex circuits for automated detection of railway crossing and A Five road junction ontrolling Traffic light system. en_US
dc.description.statementofresponsibility Ishtaque Asad
dc.description.statementofresponsibility Md. Asaduzzaman
dc.description.statementofresponsibility Tanvir Sobhan
dc.description.statementofresponsibility Khandaker Mohd. Sabbir Morshed
dc.format.extent 41 pages
dc.language.iso en en_US
dc.publisher BRAC University en_US
dc.rights BRAC University thesis are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission.
dc.subject GAL en_US
dc.subject PLD en_US
dc.subject FPGA en_US
dc.subject CPLD en_US
dc.subject Leap en_US
dc.subject Altera en_US
dc.subject Traffic light control system en_US
dc.subject Computer science and engineering
dc.title Performance comparison of CPLD and PLD based traffic light control system en_US
dc.type Thesis en_US
dc.contributor.department Department of Computer Science and Engineering, BRAC University B. Computer Science and Engineering

Files in this item

This item appears in the following Collection(s)

Show simple item record

Policy Guidelines

Search BRACU Repository

Advanced Search


My Account