Shahriar, Md. SumonAhammad, Tofail2010-10-102010-10-1020062006ID 02201036http://hdl.handle.net/10361/435Cataloged from PDF version of thesis report.Includes bibliographical references (page 38).This thesis report is submitted in partial fulfillment of the requirements for the degree of Bachelor of Science in Computer Science and Engineering, 2006.This paper proposes an asymmetric high-radix signed-digital (AHSD) adder for addition on the basis of neural network (NN) and shows that by using NN the AHSD number system supports carry-free(CF) addition. Besides, the advantages of the NN are the simple construction in high speed operation. Emphasis is placed on the NN to perform the function of addition based on the novel algorithm in the AHSD number system. Since the signed-digit number system represent the binary numbers that uses only one redundant digit for any radix r  2, the high-speed adder in the processor can be realized in the signed-digit system without a delay of the carry propagation. A Novel NN design has been constructed for CF adder based on the AHSD (4) number system is also presented. Moreover, if the radix is specified as r = 2m, where m is any positive integer, the binary-to-AHSD(r) conversion can be done in constant time regardless of the wordlength. Hence, the AHSD-to-binary conversion dominates the performance of an AHSD based arithmetic system. In order to investigate how NN design based on the AHSD number system achieves its functions, computer simulations for key circuits of conversion from binary to AHSD (4) based arithmetic systems are made. The result shows the proposed NN design can perform the operations in higher speed than existing CF addition for AHSD.81 pagesBRAC University thesis are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission.Computer science and engineeringThesis