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dc.contributor.advisorTairin, Suraiya
dc.contributor.authorSiam, Meshkat Mahfooz
dc.date.accessioned2017-05-30T08:22:53Z
dc.date.available2017-05-30T08:22:53Z
dc.date.copyright2017
dc.date.issued2017-04
dc.identifier.otherID 11201041
dc.identifier.urihttp://hdl.handle.net/10361/8210
dc.descriptionThis thesis report is submitted in partial fulfillment of the requirements for the degree of Bachelor of Science in Computer Science and Engineering, 2017.en_US
dc.descriptionCataloged from PDF version of thesis report.
dc.descriptionIncludes bibliographical references (page 42).
dc.description.abstractOperating systems at present face a large workload and are restricted by limited processing power. This may lead to lower than expected performance in practice. To counter this the operating system can apply an organizing algorithm to execute the required processes in strategically selected order. This activity is known as scheduling. Scheduling allows the computer to operate in an efficient manner and achieve the targets set for it. On this way schedulers drastically improve CPU performance. Due to its importance, quite a few scheduler algorithms have popped up over the years and research into scheduling remains a hot topic in computing. In this thesis attempts have been made to take the currently available scheduling algorithms and mold them in a planned manner into a procedure where the whole is greater than the sum of the components. As such a hybrid scheduler, named the ‘User Priority Based Efficient CPU Scheduler Algorithm For Real Time Systems’ is proposed. The suggested scheduler is subsequently designed and implemented in a simulation environment. The performance metrics of this complex algorithm are then measured. These values are at that point compared with corresponding values found for the traditional algorithms to establish standards of performance of the novel scheduler.en_US
dc.description.statementofresponsibilityMeshkat Mahfooz Siam
dc.format.extent42 pages
dc.language.isoenen_US
dc.publisherBRAC Universityen_US
dc.rightsBRAC University thesis are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission.
dc.subjectCPU scheduleren_US
dc.subjectAlgorithmen_US
dc.subjectReal timeen_US
dc.titleUser priority based efficient CPU scheduler algorithm for real time systemsen_US
dc.typeThesisen_US
dc.contributor.departmentDepartment of Computer Science and Engineering, BRAC University
dc.description.degreeB. Computer Science and Engineering


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