dc.contributor.author | Chakrabarty, Dr. Amitabha | |
dc.contributor.author | Collier, Dr. Martin | |
dc.date.accessioned | 2016-10-30T10:33:55Z | |
dc.date.available | 2016-10-30T10:33:55Z | |
dc.date.issued | 2011-12 | |
dc.identifier.citation | Chakrabarty, D. A., & Collier, D. M. (2011). Cost efficient implementation of multistage symmetric repackable networks. International Journal on Grid and High Performance Computing, 3(4), 1–13. doi:10.4018/jghpc.2011100101 | en_US |
dc.identifier.issn | 1938-0259 | |
dc.identifier.uri | http://hdl.handle.net/10361/6639 | |
dc.description | This article was published in International Journal on Grid and High Performance Computing
[© 2011 IGI Global] and the definite version is available at : http://www.igi-global.com/viewtitlesample.aspx?id=60251&ptid=48098 t=cost+efficient+implementation+of+multistage+symmetric+repackable+networks The article website is at: http://www.igi-global.com/journal/international-journal-grid-high-performance/1105 | en_US |
dc.description.abstract | Symmetric rearrangeable networks (SRN) (Chakrabarty, Collier, & Mukhopadhyay, 2009) make efficient
use of hardware, but they have the disadvantage of momentarily disrupting the existing communications
during reconfiguration. Path continuity is a major issue in some application of rearrangeable networks.
Using repackable networks (Yanga, Su, & Pin, 2008) is a solution to the path continuity problem in SRN.
These networks provide functionality comparable to that of strict sense no blocking networks (SNB) but with
minimum increase in the hardware than SRN. This paper proposes an efficient implementation of multistage
symmetric repackable networksrequiring optimum hardware cost than the method proposed in the literature.
Cost optimization is achieved through the use of minimum number of bypass link(s). Investigated method
works for networks built with more than three switching stages and shows promise of scalability | en_US |
dc.language.iso | en | en_US |
dc.publisher | © 2011 IGI Global | en_US |
dc.relation.uri | http://www.igi-global.com/article/international-journal-grid-high-performance/60251 | |
dc.subject | Blocking | en_US |
dc.subject | Bypass | en_US |
dc.subject | Interconnection networks | en_US |
dc.subject | Rearrangeable network | en_US |
dc.subject | Repackable networks | en_US |
dc.subject | Computer networking | en_US |
dc.title | Cost efficient implementation of multistage symmetric repackable networks | en_US |
dc.type | Article | en_US |
dc.description.version | Published | |
dc.identifier.doi | 10.4018/jghpc.2011100101 | |