Browsing by Author "Barua, Parag"

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    • Mixed FBB and RBB low leakage technique for high durable CMOS circuit 

      Barua, Parag; Jafar, Imran Bin; Sengupta, Prianka; Noor, Md Sadaf (© 2014 IEEE Computer Society, 2014)
      CMOS logic circuit is extensively used for designing low power Very Large Scale Integration (VLSI). Reducing the dimension of CMOS in a nanometer range, functionality and efficiency can be increased, but as a result we ...

    • Novel approaches to low leakage and area efficient VLSI Design 

      Izma, Tajrian; Barua, Parag; Rahman, Md. Rejaur; Sengupta, Prianka (BRAC University, 2011-08)
      The development of digital integrated circuits is challenged by higher power consumption. The combination of higher clock speeds, greater functional integration, and smaller process geometries has contributed to significant ...