Analysis of bulk negative capacitance field effect transistor
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In this work, a comprehensive analysis of bulk Negative Capacitance Field Effect (NCFET) transistor has been done. The objective of the paper is to show if a ferroelectric insulator is introduced in MOSFET structure, it should be possible to obtain a value of sub-threshold slope (SS) lower than 60mV/decade that puts a fundamental lower limit on the operating voltage and hence the power dissipation in standard FET based switches. Si doped HfO2 has been used as the ferroelectric material of NCFET. Polarization, energy distribution, dielectric constant, anisotropy constant variation of the Ferroelectric material has been analyzed. Condition to avoid hysteresis effect of the ferroelectric has been indicated. A numerical model of the device has been developed in Silvaco, ATLAS which included Fermi-Dirac Carrier Statistics, Shockley-Read Model, and Lombardi CVT models. Charge distribution of baseline MOSFET has been extracted from TCAD model and incorporated in 1-D Landau model to find the voltage drop across ferroelectric material. Ultimately device transfer characteristics with and without ferroelectric layer has been compared. Due to the use of FE layer, relative improvement in the device performance (especially in SS region) is observed compared to the conventional MOSFET device.