Hardware architecture design of face recognition system based on FPGA
Publisher© 2015 Institute of Electrical and Electronics Engineers Inc.
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CitationMondol, R. K., Khan, M. I., Mahbubul Hye, A. K., & Hassan, A. (2015). Hardware architecture design of face recognition system based on FPGA. Paper presented at the ICIIECS 2015 - 2015 IEEE International Conference on Innovations in Information, Embedded and Communication Systems, doi:10.1109/ICIIECS.2015.7193228
A novel hardware architecture for face-recognition system has been proposed in this paper. In order to make the system cost effective a simple yet efficient algorithm of face-recognition system has been used. We have designed, implemented and verified the algorithm in a cyclone III Field Programmable Gate Array (FPGA) chip. Altera DE0 development board which contains a cyclone III chip on it has been used for debugging purpose. We have also ensured for low power consumption such that the chip could be used universally in a wide range of security systems. To develop a simple yet efficient face recognition algorithm (such as PCA, FFT etc.) on digital hardware, we have researched on various face recognition algorithms using MATLAB codes and studied their detection efficiency under various posture and background and also the complexity of the algorithm. To save hardware resource and at the same time to obtain an acceptable level of recognition we have chosen to use Fast Fourier Transform (FFT).
KeywordsDSP Algorithm; Face Recognition; FFT; Field Programmable Gate Array (FPGA); Image Processing; PCA; VLSI
DescriptionThis conference paper was presented in the 2nd IEEE International Conference on Innovations in Information, Embedded and Communication Systems, ICIIECS 2015; Karpagam College of EngineeringCoimbatore; India; 19 March 2015 through 20 March 2015 [© 2015 Institute of Electrical and Electronics Engineers Inc.] The conference paper's definite version is available at: http://10.1109/ICIIECS.2015.7193228
DepartmentDepartment of Electrical and Electronic Engineering
- Conference Paper